42 search results - page 1 / 9 » Physical placement driven by sequential timing analysis |
ICCAD
2004
IEEE
14 years 4 months ago
2004
IEEE
Traditional timing-driven placement considers only combinational delays and does not take into account the potential of subsequent sequential optimization steps. As a result, the ...
TCAD
2008
13 years 7 months ago
2008
Physical synthesis tools are responsible for achieving timing closure. Starting with 130nm designs, multiple cycles are required to cross the chip, making latch placement critical...
ISPD
2003
ACM
14 years 27 days ago
2003
ACM
This paper presents a new timing driven force directed placement algorithm that meets physical net length constraints as well as constraints on specific pin sets. It is the first ...
DAC
1994
ACM
13 years 11 months ago
1994
ACM
Sequential place and route tools for FPGAs are inherently weak at addressing both wirability and timing optimizations. This is primarily due to the difficulty in predicting these ...
DAC
2003
ACM
14 years 27 days ago
2003
ACM
This paper describes a new force directed global placement algorithm that exploits and extends techniques from two leading placers, Force-directed [12] [26] and Mongrel [22]. It c...