Sciweavers

120 search results - page 11 / 24
» Physically based simulation of cloth on distributed memory a...
Sort
View
FCCM
1997
IEEE
103views VLSI» more  FCCM 1997»
14 years 24 days ago
An FPGA architecture for DRAM-based systolic computations
We propose an FPGA chip architecture based on a conventional FPGA logic array core, in which I/O pins are clocked at a much higher rate than that of the logic array that they serv...
Norman Margolus
IPPS
1996
IEEE
14 years 22 days ago
Implementing the Data Diffusion Machine Using Crossbar Routers
The Data Diffusion Machine is a scalable virtual shared memory architecture. A hierarchical network is used to ensure that all data can be located in a time bounded by O(logp), wh...
Henk L. Muller, Paul W. A. Stallard, David H. D. W...
DSN
2009
IEEE
14 years 14 days ago
Processor reliability enhancement through compiler-directed register file peak temperature reduction
Each semiconductor technology generation brings us closer to the imminent processor architecture heat wall, with all its associated adverse effects on system performance and reliab...
Chengmo Yang, Alex Orailoglu
FCCM
2006
IEEE
113views VLSI» more  FCCM 2006»
14 years 2 months ago
GraphStep: A System Architecture for Sparse-Graph Algorithms
— Many important applications are organized around long-lived, irregular sparse graphs (e.g., data and knowledge bases, CAD optimization, numerical problems, simulations). The gr...
Michael DeLorimier, Nachiket Kapre, Nikil Mehta, D...
IJHPCA
2007
114views more  IJHPCA 2007»
13 years 8 months ago
An Approach To Data Distributions in Chapel
A key characteristic of today’s high performance computing systems is a physically distributed memory, which makes the efficient management of locality essential for taking adv...
R. E. Diaconescu, Hans P. Zima