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TACAS
2001
Springer
135views Algorithms» more  TACAS 2001»
14 years 2 months ago
Implementing a Multi-valued Symbolic Model Checker
Multi-valued logics support the explicit modeling of uncertainty and disagreement by allowing additional truth values in the logic. Such logics can be used for verification of dyn...
Marsha Chechik, Benet Devereux, Steve M. Easterbro...
JSYML
2008
74views more  JSYML 2008»
13 years 10 months ago
Omitting types for finite variable fragments and complete representations of algebras
. We give a novel application of algebraic logic to first order logic. A new, flexible construction is presented for representable but not completely representable atomic relation ...
Tarek Sayed Ahmed, Hajnal Andréka, Istv&aac...
ICTAI
2009
IEEE
14 years 4 months ago
Probabilistic Neural Logic Network Learning: Taking Cues from Neuro-Cognitive Processes
This paper describes an attempt to devise a knowledge discovery model that is inspired from the two theoretical frameworks of selectionism and constructivism in human cognitive le...
Henry Wai Kit Chia, Chew Lim Tan, Sam Yuan Sung
DATE
2008
IEEE
126views Hardware» more  DATE 2008»
14 years 4 months ago
Design Guidelines for Metallic-Carbon-Nanotube-Tolerant Digital Logic Circuits
Metallic Carbon Nanotubes (CNTs) create source-drain shorts in Carbon Nanotube Field Effect Transistors (CNFETs), causing excessive leakage, degraded noise margin and delay variat...
Jie Zhang, Nishant Patil, Subhasish Mitra
SYNASC
2005
IEEE
129views Algorithms» more  SYNASC 2005»
14 years 3 months ago
Logic Restructuring for Delay Balancing in Wave-Pipelined Circuits: An Integer Programming Approach
In this paper we apply integer programming (IP) based techniques to the problem of delay balancing in wave-pipelined circuits. The proposed approach considers delays, as well as f...
Srivastav Sethupathy, Nohpill Park, Marcin Paprzyc...