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TC
2008
13 years 7 months ago
Automatic Generation of Modular Multipliers for FPGA Applications
Since redundant number systems allow for constant time addition, they are often at the heart of modular multipliers designed for public key cryptography (PKC) applications. Indeed,...
Jean-Luc Beuchat, Jean-Michel Muller
FPGA
2004
ACM
119views FPGA» more  FPGA 2004»
14 years 1 months ago
In-system FPGA prototyping of an itanium microarchitecture
We describe an effort to prototype an Itanium microarchitecture using an FPGA. The microarchitecture model is written in the Bluespec hardware description language (HDL) and suppo...
Roland E. Wunderlich, James C. Hoe
FPL
2009
Springer
99views Hardware» more  FPL 2009»
14 years 16 days ago
Exploiting fast carry-chains of FPGAs for designing compressor trees
Fast carry chains featuring dedicated adder circuitry is a distinctive feature of modern FPGAs. The carry chains bypass the general routing network and are embedded in the logic b...
Hadi Parandeh-Afshar, Philip Brisk, Paolo Ienne
ASYNC
2004
IEEE
121views Hardware» more  ASYNC 2004»
13 years 11 months ago
Static Tokens: Using Dataflow to Automate Concurrent Pipeline Synthesis
We describe a new intermediate compiler representation, static token form, that is suitable for dataflow-style synthesis of high-level asynchronous specifications. Static token fo...
John Teifel, Rajit Manohar
FPGA
2005
ACM
158views FPGA» more  FPGA 2005»
14 years 1 months ago
Automated synthesis for asynchronous FPGAs
We present an automatic logic synthesis method targeted for highperformance asynchronous FPGA (AFPGA) architectures. Our method transforms sequential programs as well as high-leve...
Song Peng, David Fang, John Teifel, Rajit Manohar