448 search results - page 35 / 90 » Pipelining Argumentation Technologies |
111
Voted
ISCAS
2007
IEEE
15 years 10 months ago
2007
IEEE
—The paper presents a novel architecture for a direct digital frequency synthesizer (DDFS) based on the QuasiLinear interpolation (QLIP) method. The four-segment QLIP is utilized...
124
Voted
ASYNC
2005
IEEE
15 years 9 months ago
2005
IEEE
We present two novel asynchronous control circuits for domino pipelines. The control circuits are based on GasP circuits, have a minimum cycle time of six gate delays, and compare...
119
Voted
ICMCS
2005
IEEE
15 years 9 months ago
2005
IEEE
The paper presents a high-performance architecture of the bit-plane coder for the embedded block coding algorithm in JPEG 2000. The architecture adopts a pipeline structure and is...
110
Voted
SEMWEB
2005
Springer
15 years 9 months ago
2005
Springer
The paper presents a framework for introducing design patterns that facilitate or improve the techniques used during ontology lifecycle. Some distinctions are drawn between kinds o...
143
Voted
ASPDAC
2000
ACM
15 years 7 months ago
2000
ACM
The paper presents an application specific Java processor including reconfigurabilities, which is a DLX like pipeline processor with 5 stages and executes Java byte codes directly....