Sciweavers

403 search results - page 64 / 81
» Plenoptic path and its applications
Sort
View
ICCAD
2005
IEEE
127views Hardware» more  ICCAD 2005»
14 years 4 months ago
Flip-flop insertion with shifted-phase clocks for FPGA power reduction
— Although the LUT (look-up table) size of FPGAs has been optimized for general applications, complicated designs may contain a large number of cascaded LUTs between flip-flops...
Hyeonmin Lim, Kyungsoo Lee, Youngjin Cho, Naehyuck...
SASO
2009
IEEE
14 years 2 months ago
Self-organized Fault-tolerant Routing in Peer-to-Peer Overlays
—In sufficiently large heterogeneous overlays message loss and delays are likely to occur. This has a significant impact on overlay routing, especially on longer paths. The exi...
Wojciech Galuba, Karl Aberer, Zoran Despotovic, Wo...
INFOCOM
2006
IEEE
14 years 1 months ago
A Compound TCP Approach for High-Speed and Long Distance Networks
—Many applications require fast data transfer over high speed and long distance networks. However, standard TCP fails to fully utilize the network capacity due to the limitation ...
Kun Tan, Jingmin Song, Qian Zhang, Murari Sridhara...
ASPDAC
2001
ACM
130views Hardware» more  ASPDAC 2001»
13 years 11 months ago
Area/delay estimation for digital signal processor cores
Hardware/software partitioning is one of the key processes in a hardware/software cosynthesis system for digital signal processor cores. In hardware/software partitioning, area and...
Yuichiro Miyaoka, Yoshiharu Kataoka, Nozomu Togawa...
ANCS
2008
ACM
13 years 10 months ago
On design of bandwidth scheduling algorithms for multiple data transfers in dedicated networks
The significance of high-performance dedicated networks has been well recognized due to the rapidly increasing number of large-scale applications that require high-speed data tran...
Yunyue Lin, Qishi Wu