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CF
2007
ACM
14 years 2 months ago
Reconfigurable hybrid interconnection for static and dynamic scientific applications
As we enter the era of petascale computing, system architects must plan for machines composed of tens or even hundreds of thousands of processors. Although fully connected network...
Shoaib Kamil, Ali Pinar, Daniel Gunter, Michael Li...
HPCA
2009
IEEE
14 years 11 months ago
In-Network Snoop Ordering (INSO): Snoopy coherence on unordered interconnects
Realizing scalable cache coherence in the many-core era comes with a whole new set of constraints and opportunities. It is widely believed that multi-hop, unordered on-chip networ...
Niket Agarwal, Li-Shiuan Peh, Niraj K. Jha
DATE
2005
IEEE
113views Hardware» more  DATE 2005»
14 years 4 months ago
Evaluation of Bus Based Interconnect Mechanisms in Clustered VLIW Architectures
With new sophisticated compiler technology, it is possible to schedule distant instructions efficiently. As a consequence, the amount of exploitable instruction level parallelism...
Anup Gangwar, M. Balakrishnan, Preeti Ranjan Panda...
CGF
2011
13 years 2 months ago
Procedural Modeling of Interconnected Structures
The complexity and detail of geometric scenes that are used in today’s computer animated films and interactive games have reached a level where the manual creation by tradition...
Lars Krecklau, Leif Kobbelt
ASPDAC
2010
ACM
120views Hardware» more  ASPDAC 2010»
13 years 8 months ago
Wideband reduced modeling of interconnect circuits by adaptive complex-valued sampling method
In this paper, we propose a new wideband model order reduction method for interconnect circuits by using a novel adaptive sampling and error estimation scheme. We try to address t...
Hai Wang, Sheldon X.-D. Tan, Gengsheng Chen