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» Points-to analysis using BDDs
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FMCAD
2004
Springer
13 years 11 months ago
Memory Efficient All-Solutions SAT Solver and Its Application for Reachability Analysis
This work presents a memory-efficient All-SAT engine which, given a propositional formula over sets of important and non-important variables, returns the set of all the assignments...
Orna Grumberg, Assaf Schuster, Avi Yadgar
TC
1998
13 years 7 months ago
Abstraction Techniques for Validation Coverage Analysis and Test Generation
ion Techniques for Validation Coverage Analysis and Test Generation Dinos Moundanos, Jacob A. Abraham, Fellow, IEEE, and Yatin V. Hoskote —The enormous state spaces which must be...
Dinos Moundanos, Jacob A. Abraham, Yatin Vasant Ho...
DAC
2006
ACM
14 years 8 months ago
Symmetry detection for large Boolean functions using circuit representation, simulation, and satisfiability
- Classical two-variable symmetries play an important role in many EDA applications, ranging from logic synthesis to formal verification. This paper proposes a complete circuit-bas...
Jin S. Zhang, Alan Mishchenko, Robert K. Brayton, ...
ICCD
2003
IEEE
127views Hardware» more  ICCD 2003»
14 years 4 months ago
Structural Detection of Symmetries in Boolean Functions
Functional symmetries provide significant benefits for multiple tasks in synthesis and verification. Many applications require the manual specification of symmetries using spe...
Guoqiang Wang, Andreas Kuehlmann, Alberto L. Sangi...
GLVLSI
2003
IEEE
153views VLSI» more  GLVLSI 2003»
14 years 23 days ago
FORCE: a fast and easy-to-implement variable-ordering heuristic
The MINCE heuristic for variable-ordering [1] successfully reduces the size of BDDs and can accelerate SAT-solving. Applications to reachability analysis have also been successful...
Fadi A. Aloul, Igor L. Markov, Karem A. Sakallah