142 search results - page 9 / 29 » Polymorphic On-Chip Networks |
AHS
2006
IEEE
14 years 1 months ago
2006
IEEE
— This invited paper overviews the low level debug support hardware required for an on-chip predeployment debugging system for sensor networks. The solution provides significant...
MICRO
2010
IEEE
13 years 5 months ago
2010
IEEE
As the number of cores and threads in manycore compute accelerators such as Graphics Processing Units (GPU) increases, so does the importance of on-chip interconnection network des...
DATE
2000
IEEE
14 years 1 days ago
2000
IEEE
This paper presents an architectural study of a scalable system-level interconnection template. We explain why the shared bus, which is today's dominant template, will not me...
ASAP
2007
IEEE
13 years 11 months ago
2007
IEEE
We present a design of a customized crossbar scheduler for on-chip networks. The proposed scheduler arbitrates on-demand interconnects, where physical topologies are identical to ...
ICIP
1994
IEEE
14 years 9 months ago
1994
IEEE
A newmethodfornormalizingandquantizingimagesispresented. The method is based oncalculating a local referenceframeforthe imagegray levels. "helevels of the referenceframeareca...