51 search results - page 6 / 11 » Post-Layout Optimization for Deep Submicron Design |
TCAD
2002
13 years 7 months ago
2002
This paper introduces an accurate analysis of on-chip inductance effects for distributed interconnects that takes the effect of both the series resistance and the output parasitic ...
DAC
1999
ACM
14 years 8 months ago
1999
ACM
In this paper, we establish a theoretical framework for a new concept of scheduling called soft scheduling. In contrasts to the traditional schedulers referred as hard schedulers,...
ICCAD
2003
IEEE
14 years 4 months ago
2003
IEEE
Current design automation methodologies are becoming incapable of achieving design closure especially in the presence of deep submicron effects. This paper addresses the issue of ...
DAC
1999
ACM
13 years 12 months ago
1999
ACM
Buffer insertion has become a critical step in deep submicron design, and several buffer insertion/sizing algorithms have been proposed in the literature. However, most of these m...
ASPDAC
2008
ACM
13 years 9 months ago
2008
ACM
Abstract-- Increasing delay and power variation are significant challenges to the designers as technology scales to the deep sub-micron (DSM) regime. Traditional module selection t...