1419 search results - page 22 / 284 » Power Droop Testing |
DATE
2005
IEEE
14 years 3 months ago
2005
IEEE
— With increasing process fluctuations in nano-scale technology, testing for delay faults is becoming essential in manufacturing test to complement stuck-at-fault testing. Desig...
BMCBI
2010
13 years 10 months ago
2010
Background: In high-dimensional data analysis such as differential gene expression analysis, people often use filtering methods like fold-change or variance filters in an attempt ...
ICCAD
2001
IEEE
14 years 6 months ago
2001
IEEE
1 We propose an integrated technique for extensive optimization of the final test solution for System-on-Chip using Simulated Annealing. The produced results from the technique ar...
ICCAD
2007
IEEE
14 years 6 months ago
2007
IEEE
— This paper proposes a selective pattern-compression scheme to minimize both test power and test data volume during scan-based testing. The proposed scheme will selectively supp...
ITC
2003
IEEE
14 years 3 months ago
2003
IEEE
In a scan-based system with a large number of flip-flops, a major component of power is consumed during scanshift and clocking operation in test mode. In this paper, a novel scan-...