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MICRO
2003
IEEE
143views Hardware» more  MICRO 2003»
14 years 1 months ago
VSV: L2-Miss-Driven Variable Supply-Voltage Scaling for Low Power
Energy-efficient processor design is becoming more and more important with technology scaling and with high performance requirements. Supply-voltage scaling is an efficient way to...
Hai Li, Chen-Yong Cher, T. N. Vijaykumar, Kaushik ...
ICNP
2006
IEEE
14 years 2 months ago
Benefit-based Data Caching in Ad Hoc Networks
—Data caching can significantly improve the efficiency of information access in a wireless ad hoc network by reducing the access latency and bandwidth usage. However, designing e...
Bin Tang, Himanshu Gupta, Samir R. Das
ICDE
2008
IEEE
161views Database» more  ICDE 2008»
14 years 9 months ago
COLR-Tree: Communication-Efficient Spatio-Temporal Indexing for a Sensor Data Web Portal
Abstract-- We present COLR-Tree, an abstraction layer designed to support efficient spatio-temporal queries on live data gathered from a large collection of sensors. We use COLR-Tr...
Yanif Ahmad, Suman Nath
CAL
2008
13 years 8 months ago
BENoC: A Bus-Enhanced Network on-Chip for a Power Efficient CMP
Network-on-Chips (NoCs) outperform buses in terms of scalability, parallelism and system modularity and therefore are considered as the main interconnect infrastructure in future c...
I. Walter, Israel Cidon, Avinoam Kolodny
GLVLSI
2008
IEEE
140views VLSI» more  GLVLSI 2008»
14 years 2 months ago
A table-based method for single-pass cache optimization
Due to the large contribution of the memory subsystem to total system power, the memory subsystem is highly amenable to customization for reduced power/energy and/or improved perf...
Pablo Viana, Ann Gordon-Ross, Edna Barros, Frank V...