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» Power Efficient Data Cache Designs
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ICIP
2001
IEEE
14 years 10 months ago
Motion estimation for low power video devices
We propose a block motion estimation (ME) algorithm that meets high quality requirements and allows for cost efficient VLSI realizations. It relies on a set of rules common to all...
Christophe De Vleeschouwer, Tord Nilsson
EDBT
2009
ACM
165views Database» more  EDBT 2009»
13 years 6 months ago
Exploiting the power of relational databases for efficient stream processing
Stream applications gained significant popularity over the last years that lead to the development of specialized stream engines. These systems are designed from scratch with a di...
Erietta Liarou, Romulo Goncalves, Stratos Idreos
CASES
2006
ACM
14 years 6 days ago
Improving the performance and power efficiency of shared helpers in CMPs
Technology scaling trends have forced designers to consider alternatives to deeply pipelining aggressive cores with large amounts of performance accelerating hardware. One alterna...
Anahita Shayesteh, Glenn Reinman, Norman P. Jouppi...
DAC
1998
ACM
14 years 9 months ago
Power Optimization of Variable Voltage Core-Based Systems
The growing class of portable systems, such as personal computing and communication devices, has resulted in a new set of system design requirements, mainly characterized by domin...
Inki Hong, Darko Kirovski, Gang Qu, Miodrag Potkon...
ISCA
2005
IEEE
144views Hardware» more  ISCA 2005»
14 years 2 months ago
Scalable Load and Store Processing in Latency Tolerant Processors
Memory latency tolerant architectures support thousands of in-flight instructions without scaling cyclecritical processor resources, and thousands of useful instructions can compl...
Amit Gandhi, Haitham Akkary, Ravi Rajwar, Srikanth...