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DAC
1996
ACM
15 years 10 months ago
Address Calculation for Retargetable Compilation and Exploration of Instruction-Set Architectures
The advent of parallel executing Address Calculation Units (ACUs) in Digital Signal Processor (DSP) and Application Specific InstructionSet Processor (ASIP) architectures has made...
Clifford Liem, Pierre G. Paulin, Ahmed Amine Jerra...
ICSE
2008
IEEE-ACM
16 years 7 months ago
Design and implementation of the software architecture for a 3-D reconstruction system in medical imaging
The design and implementation of the reconstruction system in medical X-ray imaging is a challenging issue due to its immense computational demands. In order to ensure an efficien...
Holger Scherl, Stefan Hoppe, Markus Kowarschik, Jo...
WAE
2001
281views Algorithms» more  WAE 2001»
15 years 7 months ago
Using PRAM Algorithms on a Uniform-Memory-Access Shared-Memory Architecture
The ability to provide uniform shared-memory access to a significant number of processors in a single SMP node brings us much closer to the ideal PRAM parallel computer. In this pa...
David A. Bader, Ajith K. Illendula, Bernard M. E. ...
NOCS
2007
IEEE
16 years 13 days ago
The Power of Priority: NoC Based Distributed Cache Coherency
The paper introduces Network-on-Chip (NoC) design methodology and low cost mechanisms for supporting efficient cache access and cache coherency in future high-performance Chip Mul...
Evgeny Bolotin, Zvika Guz, Israel Cidon, Ran Ginos...
ISCAS
2006
IEEE
108views Hardware» more  ISCAS 2006»
16 years 5 days ago
An optimal normal basis elliptic curve cryptoprocessor for inductive RFID application
In this paper a 173-bit type II ONB ECC processor Section II introduces the mathematical backgrounds for for inductive RFID applications is described. Compared with curve operation...
Pak-Keung Leung, Oliver Chiu-sing Choy, Cheong-fat...