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CODES
2005
IEEE
14 years 1 months ago
Future processors: flexible and modular
The ability to continue increasing processor frequency and single thread performance is being severely limited by exponential increases in leakage and active power. To continue to...
Charlie Johnson, Jeff Welser
IEEEHPCS
2010
13 years 5 months ago
Novel performance optimization of large-scale discrete-event simulation on the Cell Broadband Engine
This paper presents a computing technique for efficient parallel simulation of large-scale discrete-event models on the IBM Cell Broadband Engine (CBE), which has one Power Proces...
Qi Liu, Gabriel A. Wainer, Ligang Lu, Michael Perr...
ASPDAC
2004
ACM
158views Hardware» more  ASPDAC 2004»
13 years 11 months ago
Decode filter cache for energy efficient instruction cache hierarchy in super scalar architectures
Abstract-- The power consumption of microprocessors has been increasing in step with the complexity of each progressive generation. In general purpose processors, this is primarily...
Kugan Vivekanandarajah, Thambipillai Srikanthan, S...
SIPS
2008
IEEE
14 years 1 months ago
Efficient mapping of advanced signal processing algorithms on multi-processor architectures
Modern microprocessor technology is migrating from simply increasing clock speeds on a single processor to placing multiple processors on a die to increase throughput and power pe...
Bhavana B. Manjunath, Aaron S. Williams, Chaitali ...
CASES
2007
ACM
13 years 11 months ago
Performance-driven syntax-directed synthesis of asynchronous processors
The development of robust and efficient synthesis tools is important if asynchronous design is to gain more widespread acceptance. Syntax-directed translation is a powerful synthe...
Luis A. Plana, Doug A. Edwards, Sam Taylor, Luis A...