1238 search results - page 232 / 248 » Power Efficient Processor Architecture and The Cell Processo... |
FCCM
2002
IEEE
14 years 2 months ago
2002
IEEE
The paper presents a Design Space Exploration (DSE) experiment which has been carried out in order to determine the optimum FPGA–based Variable-Length Decoder (VLD) computing re...
VLSID
2006
IEEE
14 years 3 months ago
2006
IEEE
This tutorial focuses on advanced techniques to cope with the complexity of designing modern digital chips which are complete systems often containing multiple processors, complex...
SC
2000
ACM
14 years 2 months ago
2000
ACM
The current trend in HPC hardware is towards clusters of shared-memory (SMP) compute nodes. For applications developers the major question is how best to program these SMP cluster...
CGO
2005
IEEE
14 years 3 months ago
2005
IEEE
The growing complexity of modern processors has made the generation of highly efficient code increasingly difficult. Manual code generation is very time consuming, but it is oft...
ISLPED
2005
ACM
14 years 3 months ago
2005
ACM
In this paper, we take the idea of application-level processing on disks to one level further, and focus on an architecture, called Cluster of Active Disks (CAD), where the storag...