In a synchronous finite state machine (FSM), huge current peaks are often observed at the moment of state transition. Previous low power state encoding algorithms focus on the red...
This paper discusses fault-tolerant techniques for SRAM-based FPGAs. These techniques can be based on circuit level modifications, with obvious modifications in the programmable a...
Fernanda Lima Kastensmidt, Gustavo Neuberger, Luig...
ple (Extended Abstract) Edmund M. Clarke and Sergey Berezin Carnegie Mellon University -- USA Model checking is an automatic verification technique for finite state concurrent syst...
While customizable processors aim at combining the flexibility of general purpose processors with the speed and power advantages of custom circuits, commercially available process...
Abstract--As demand increases for circuits with higher performance, higher complexity, and decreased feature size, asynchronous (clockless) paradigms will become more widely used i...