979 search results - page 103 / 196 » Power Macromodeling for High Level Power Estimation |
VLSID
2006
IEEE
14 years 9 months ago
2006
IEEE
SoC design methodologies are under constant revision due to adoption of fast shrinking process technologies at nanometer levels. Nanometer process geometries exhibit new complex d...
RULEML
2009
Springer
14 years 3 months ago
2009
Springer
Abstract. We present the Tom language that extends Java with the purpose of providing high level constructs inspired by the rewriting community. Tom bridges thus the gap between a ...
BIRTHDAY
2008
Springer
13 years 11 months ago
2008
Springer
In this paper a sequence of model transformation languages L0, L1, L2 is defined. The first language L0 is very simple, and for this language it is easy to build an efficient compi...
HOTI
2008
IEEE
14 years 3 months ago
2008
IEEE
Cell Broadband EngineTM is a multi-core system on a chip and is composed of a general-purpose Power Processing Element (PPE) and eight Synergistic Processing Elements (SPEs). Its ...
CODES
2007
IEEE
14 years 3 months ago
2007
IEEE
3D stacked wafer integration has the potential to improve multiprocessor system-on-chip (MPSoC) integration density, performance, and power efficiency. However, the power density...