979 search results - page 177 / 196 » Power Macromodeling for High Level Power Estimation |
ICS
2005
Tsinghua U.
14 years 1 months ago
2005
Tsinghua U.
In an out-of-order issue processor, instructions are dynamically reordered and issued to function units in their dataready order rather than their original program order to achiev...
CEE
2007
13 years 7 months ago
2007
Real-time systems are often designed using preemptive scheduling and worst-case execution time estimates to guarantee the execution of high priority tasks. There is, however, an i...
DAC
2006
ACM
14 years 8 months ago
2006
ACM
Recent progress on nanodevices, such as carbon nanotubes and nanowires, points to promising directions for future circuit design. However, nanofabrication techniques are not yet m...
CLUSTER
2007
IEEE
14 years 2 months ago
2007
IEEE
— The Cell Broadband Engine (BE) is a heterogeneous multicore processor, combining a general-purpose POWER architecture core with eight independent single-instructionmultiple-dat...
COMSWARE
2007
IEEE
14 years 2 months ago
2007
IEEE
—Sensor networks represent a new frontier in technology that holds the promise of unprecedented levels of autonomy in the execution of complex dynamic missions by harnessing the ...