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» Power Macromodeling for High Level Power Estimation
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DSD
2004
IEEE
104views Hardware» more  DSD 2004»
13 years 11 months ago
A Static Low-Power, High-Performance 32-bit Carry Skip Adder
In this paper, we present a full-static carry-skip adder designed to achieve low power dissipation and high-performance operation. To reduce the adder's delay and power consu...
Kai Chirca, Michael J. Schulte, John Glossner, Hao...
FCCM
2006
IEEE
162views VLSI» more  FCCM 2006»
14 years 1 months ago
Power Visualization, Analysis, and Optimization Tools for FPGAs
This paper introduces the Low-Power Intelligent Tool Environment (LITE), an object oriented tool set designed for power visualization, analysis, and optimization. These tools lever...
Matthew French, Li Wang, Michael J. Wirthlin
NIPS
2004
13 years 9 months ago
Methods for Estimating the Computational Power and Generalization Capability of Neural Microcircuits
What makes a neural microcircuit computationally powerful? Or more precisely, which measurable quantities could explain why one microcircuit C is better suited for a particular fa...
Wolfgang Maass, Robert A. Legenstein, Nils Bertsch...
ISLPED
1998
ACM
95views Hardware» more  ISLPED 1998»
13 years 12 months ago
The petrol approach to high-level power estimation
High-level power estimation is essential for designing complex low-power ICs. However, the lack of flexibility, or restriction to synthesizable code of previously presented high-...
Rafael Peset Llopis, Kees G. W. Goossens
ICIP
2001
IEEE
14 years 9 months ago
Motion estimation for low power video devices
We propose a block motion estimation (ME) algorithm that meets high quality requirements and allows for cost efficient VLSI realizations. It relies on a set of rules common to all...
Christophe De Vleeschouwer, Tord Nilsson