In this paper, an optimization for the classical statistical power estimation method is proposed. This technique is applied to the individual nodes. The optimization is based on t...
We will present a power estimation technique for digital integrated circuits that operates at the register transfer level RTL. Such a high-level power estimation capability is r...
In this paper, we present a new statistical technique for estimation of average power dissipation in digital circuits. Present statistical techniques estimate the average power ba...
- This paper presents an effective technique for compacting a large sequence of input vectors into a much smaller one such that when the two sequences are applied to any circuit, t...
— This paper presents a method of low-power variable-block-size motion estimation using pixel truncation. Previous work focused on implementing pixel truncation using fixed-bloc...