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» Power Macromodeling for High Level Power Estimation
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ITC
1989
IEEE
82views Hardware» more  ITC 1989»
13 years 12 months ago
CMOS IC Stuck-Open Fault Electrical Effects and Design Considerations
- The electrical effects of CMOS IC physical defects that caused stuck-openfaults are evaluated, including their voltage levels, quiescent power supply current (IDDQ), transient re...
Jerry M. Soden, R. Keith Treece, Michael R. Taylor...
DATE
1998
IEEE
153views Hardware» more  DATE 1998»
14 years 3 days ago
An Energy-Conscious Exploration Methodology for Reconfigurable DSPs
As the "system-on-a-chip" concept is rapidly becoming a reality, time-to-market and product complexity push the reuse of complex macromodules. Circuits combining a varie...
Jan M. Rabaey, Marlene Wan
ICCD
2002
IEEE
228views Hardware» more  ICCD 2002»
14 years 4 months ago
JMA: The Java-Multithreading Architecture for Embedded Processors
Embedded processors are increasingly deployed in applications requiring high performance with good real-time characteristics whilst being low power. Parallelism has to be extracte...
Panit Watcharawitch, Simon W. Moore
GLOBECOM
2007
IEEE
14 years 2 months ago
Frequency Agile Interference-Aware Channel Sounding for Dynamic Spectrum Access Networks
— In this paper, we propose a novel channel sounding technique, called the multicarrier direct sequence swept time delay cross-correlation (MC-DS-STDCC), which is designed to min...
Qi Chen, Alexander M. Wyglinski, Gary J. Minden
ICANN
2003
Springer
14 years 1 months ago
Confidence Estimation Using the Incremental Learning Algorithm, Learn++
Pattern recognition problems span a broad range of applications, where each application has its own tolerance on classification error. The varying levels of risk associated with ma...
Jeffrey Byorick, Robi Polikar