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» Power Optimization in Current Mode Circuits
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SLIP
2009
ACM
14 years 1 months ago
Prediction of high-performance on-chip global interconnection
Different interconnection structures have been proposed to solve the performance limitation caused by scaling of on-chip global wires. In this paper, we give an overview of curre...
Yulei Zhang, Xiang Hu, Alina Deutsch, A. Ege Engin...
CODES
2005
IEEE
14 years 19 days ago
System-level design automation tools for digital microfluidic biochips
Biochips based on digital microfluidics offer a powerful platform for massively parallel biochemical analysis such as clinical diagnosis and DNA sequencing. Current full-custom de...
Krishnendu Chakrabarty, Fei Su
ISLPED
1999
ACM
236views Hardware» more  ISLPED 1999»
13 years 11 months ago
Modeling and automating selection of guarding techniques for datapath elements
While guarded evaluation has proven an effective energy saving technique in arithmetic circuits, good methodologies do not exist for determining when and how to guard for maximal ...
William E. Dougherty, Donald E. Thomas
ICCD
1997
IEEE
158views Hardware» more  ICCD 1997»
13 years 10 months ago
Practical Advances in Asynchronous Design
Asynchronous systems are being viewed as an increasingly viable alternative to purely synchronous systems. This paper gives an overview of the current state of the art in practica...
Erik Brunvand, Steven M. Nowick, Kenneth Y. Yun
CASES
2003
ACM
14 years 8 days ago
A low-power accelerator for the SPHINX 3 speech recognition system
Accurate real-time speech recognition is not currently possible in the mobile embedded space where the need for natural voice interfaces is clearly important. The continuous natur...
Binu K. Mathew, Al Davis, Zhen Fang