430 search results - page 15 / 86 » Power Optimized Combinational Logic Design |
CIKM
2006
Springer
13 years 11 months ago
2006
Springer
By providing an integrated and optimized support for user-defined aggregates (UDAs), data stream management systems (DSMS) can achieve superior power and generality while preservi...
ATS
2005
IEEE
14 years 1 months ago
2005
IEEE
Power reduction during test application is important from the viewpoint of chip reliability and for obtaining correct test results. One of the ways to reduce scan test power is to...
TWC
2008
13 years 7 months ago
2008
Space-time block codes (STBC) using coordinate interleaved orthogonal designs (CIOD) proposed recently by Khan and Rajan allow single-complex symbol decoding and offer higher data ...
EUROGP
2004
Springer
14 years 1 months ago
2004
Springer
Abstract. In this paper we propose an approach to Genetic Programming based on code reuse and we test it in the design of combinational logic circuits at the gate-level. The circui...
ISLPED
2003
ACM
14 years 29 days ago
2003
ACM
Power will be the key limiter to system scalability as interconnection networks take up an increasingly significant portion of system power. In this paper, we propose an architec...