Sciweavers

430 search results - page 18 / 86
» Power Optimized Combinational Logic Design
Sort
View
ICC
2008
IEEE
115views Communications» more  ICC 2008»
14 years 2 months ago
Joint Power Scheduling and Estimator Design for Sensor Networks Across Parallel Channels
—This paper addresses the joint estimator and power optimization problem for a sensor network whose mission is to estimate an unknown parameter. We assume a two-hop network where...
Lauren M. Huie, Xiang He, Aylin Yener
PATMOS
2005
Springer
14 years 1 months ago
Power - Performance Optimization for Custom Digital Circuits
This paper presents a modular optimization framework for custom digital circuits in the power – performance space. The method uses a static timer and a nonlinear optimizer to max...
Radu Zlatanovici, Borivoje Nikolic
FPL
2005
Springer
100views Hardware» more  FPL 2005»
14 years 1 months ago
Power and Area Optimization for Multiple Restricted Multiplication
This paper presents a design and optimization technique for the Multiple Restricted Multiplication problem [1]. This refers to a situation where a single variable is multiplied by...
Nalin Sidahao, George A. Constantinides, Peter Y. ...
DAC
2005
ACM
14 years 8 months ago
A novel synthesis approach for active leakage power reduction using dynamic supply gating
: Due to exponential increase in subthreshold leakage with technology scaling and temperature increase, leakage power is becoming a major fraction of total power in the active mode...
Swarup Bhunia, Nilanjan Banerjee, Qikai Chen, Hami...
ICCAD
2000
IEEE
135views Hardware» more  ICCAD 2000»
14 years 4 days ago
Power Optimization of Real-Time Embedded Systems on Variable Speed Processors
Power efficient design of real-time embedded systems based on programmable processors becomes more important as system functionality is increasingly realized through software. Th...
Youngsoo Shin, Kiyoung Choi, Takayasu Sakurai