Abstract—We present a throughput-driven partitioning algorithm and a throughput-preserving merging algorithm for the high-level physical synthesis of latency-insensitive (LI) sys...
The CRIL multi-strategy platform for SAT includes a whole family of local search techniques and some of the best Davis and Putnam strategies for checking propositional satis abilit...
An evolutionary algorithm is used to design a finite impulse response digital filter with reduced power consumption. The proposed design approach combines genetic optimization an...
This article presents a power estimation tool integrated with an FPGA design flow. It is able to estimate total and individual-node average power consumption for combinational blo...
Elias Todorovich, Fabian Angarita, Javier Valls, E...