734 search results - page 46 / 147 » Power balanced pipelines |
DSD
2004
IEEE
14 years 12 days ago
2004
IEEE
In this paper, we present a full-static carry-skip adder designed to achieve low power dissipation and high-performance operation. To reduce the adder's delay and power consu...
ICPP
2003
IEEE
14 years 1 months ago
2003
IEEE
In chip-multiprocessors (CMPs), the number of cores and the issue width of each core presents an important design trade-off to balance the amount of TLP and ILP between multi-thre...
ICCAD
2002
IEEE
14 years 5 months ago
2002
IEEE
This paper presents methods for efficient power minimization at circuit and micro-architectural levels. The potential energy savings are strongly related to the energy profile of ...
MICRO
2010
IEEE
13 years 6 months ago
2010
IEEE
Single-thread performance, reliability and power efficiency are critical design challenges of future multicore systems. Although point solutions have been proposed to address thes...
ISCAS
2005
IEEE
14 years 2 months ago
2005
IEEE
—A low-power high-SFDR CMOS direct digital frequency synthesizer (DDFS) is presented. Several design techniques, including a cell-based lookup table, a power aware parameters sel...