734 search results - page 4 / 147 » Power balanced pipelines |
DATE
2005
IEEE
13 years 10 months ago
2005
IEEE
Operating frequency of a pipelined circuit is determined by the delay of the slowest pipeline stage. However, under statistical delay variation in sub-100nm technology regime, the...
SENSYS
2010
ACM
13 years 6 months ago
2010
ACM
Supporting continuous sensing applications on mobile phones is challenging because of the resource demands of long-term sensing, inference and communication algorithms. We present...
ISCAS
1999
IEEE
14 years 26 days ago
1999
IEEE
Modem computer and communication system design has to consider the timing constraints imposed by communication and system pipelines, and minimize the energy consumption. We adopt ...
GLVLSI
2003
IEEE
14 years 1 months ago
2003
IEEE
Power-awareness indicates the scalability of the system energy with changing conditions and quality requirements. Multipliers are essential elements used in DSP applications and c...
ISCAS
2007
IEEE
14 years 2 months ago
2007
IEEE
Abstract—This paper presents a method to investigate powerperformance tradeoffs in digital pipelined designs. The method is applied at the architectural level of the design. It w...