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» Power distribution techniques for dual VDD circuits
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ECCC
2011
223views ECommerce» more  ECCC 2011»
13 years 3 months ago
A Case of Depth-3 Identity Testing, Sparse Factorization and Duality
Polynomial identity testing (PIT) problem is known to be challenging even for constant depth arithmetic circuits. In this work, we study the complexity of two special but natural ...
Chandan Saha, Ramprasad Saptharishi, Nitin Saxena
CASES
2006
ACM
14 years 2 months ago
Methods for power optimization in distributed embedded systems with real-time requirements
Dynamic voltage scaling and sleep state control have been shown to be extremely effective in reducing energy consumption in CMOS circuits. Though plenty of research papers have st...
Razvan Racu, Arne Hamann, Rolf Ernst, Bren Mochock...
ISCAS
2007
IEEE
179views Hardware» more  ISCAS 2007»
14 years 2 months ago
Analysis for Signal and Power Integrity Using the Multilayered Finite Difference Method
— We present a method for fast analysis of signal and power integrity based on a recently developed multilayered finite difference method (M-FDM). In order to accurately model m...
Ege Engin, Krishna Bharath, Madhavan Swaminathan
DAC
2006
ACM
14 years 2 months ago
Circuits for energy harvesting sensor signal processing
duce system weight and volume, increase operating lifetime, The recent explosion in capability of embedded and portable decrease maintenance costs, and open new frontiers for inele...
Rajeevan Amirtharajah, Justin Wenck, Jamie Collier...
ICCAD
2009
IEEE
132views Hardware» more  ICCAD 2009»
13 years 6 months ago
DynaTune: Circuit-level optimization for timing speculation considering dynamic path behavior
Traditional circuit design focuses on optimizing the static critical paths no matter how infrequently these paths are exercised dynamically. Circuit optimization is then tuned to ...
Lu Wan, Deming Chen