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CGO
2004
IEEE
14 years 1 months ago
FLASH: Foresighted Latency-Aware Scheduling Heuristic for Processors with Customized Datapaths
Application-specific instruction set processors (ASIPs) have the potential to meet the challenging cost, performance, and power goals of future embedded processors by customizing ...
Manjunath Kudlur, Kevin Fan, Michael L. Chu, Rajiv...
TVLSI
2010
13 years 4 months ago
C-Pack: A High-Performance Microprocessor Cache Compression Algorithm
Microprocessor designers have been torn between tight constraints on the amount of on-chip cache memory and the high latency of off-chip memory, such as dynamic random access memor...
Xi Chen, Lei Yang, Robert P. Dick, Li Shang, Haris...
FPGA
2006
ACM
224views FPGA» more  FPGA 2006»
14 years 1 months ago
Flexible implementation of genetic algorithms on FPGAs
In this paper, we propose a technique to flexibly implement genetic algorithms for various problems on FPGAs. For the purpose, we propose a basic architecture for GA which consist...
Tatsuhiro Tachibana, Yoshihiro Murata, Naoki Shiba...
ACIVS
2006
Springer
14 years 3 months ago
Discrete Choice Models for Static Facial Expression Recognition
In this paper we propose the use of Discrete Choice Analysis (DCA) for static facial expression classification. Facial expressions are described with expression descriptive units ...
Gianluca Antonini, Matteo Sorci, Michel Bierlaire,...
FGR
2000
IEEE
112views Biometrics» more  FGR 2000»
14 years 2 months ago
A Probabilistic Sensor for the Perception of Activities
This paper presents a new technique for the perception of activities using statistical description of spatio-temporal properties. With this approach, the probability of an activit...
Olivier Chomat, James L. Crowley