256 search results - page 38 / 52 » Power grid analysis benchmarks |
ICCAD
2001
IEEE
14 years 4 months ago
2001
IEEE
The aim of this work is to provide an elegant and accurate static execution timing model for 32-bit microprocessor instruction sets, covering also inter–instruction effects. Suc...
ICPPW
2002
IEEE
14 years 19 days ago
2002
IEEE
The effectiveness of the memory hierarchy is critical for the performance of current processors. The performance of the memory hierarchy can be improved by means of program transf...
SIGSOFT
2008
ACM
14 years 8 months ago
2008
ACM
Runtime monitoring allows programmers to validate, for instance, the proper use of application interfaces. Given a property specification, a runtime monitor tracks appropriate run...
DATE
2007
IEEE
14 years 2 months ago
2007
IEEE
In this paper, we propose a novel statistical model order reduction technique, called statistical spectrum model order reduction (SSMOR) method, which considers both intra-die and...
CODES
2007
IEEE
14 years 2 months ago
2007
IEEE
3D stacked wafer integration has the potential to improve multiprocessor system-on-chip (MPSoC) integration density, performance, and power efficiency. However, the power density...