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» Power minimization using control generated clocks
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DAC
2006
ACM
14 years 9 months ago
Generation of yield-aware Pareto surfaces for hierarchical circuit design space exploration
Pareto surfaces in the performance space determine the range of feasible performance values for a circuit topology in a given technology. We present a non-dominated sorting based ...
Saurabh K. Tiwary, Pragati K. Tiwary, Rob A. Ruten...
SASO
2007
IEEE
14 years 3 months ago
Desynchronization: The Theory of Self-Organizing Algorithms for Round-Robin Scheduling
The study of synchronization has received much attention in a variety of applications, ranging from coordinating sensors in wireless networks to models of fireflies flashing in...
Ankit Patel, Julius Degesys, Radhika Nagpal
SIGMOD
2009
ACM
220views Database» more  SIGMOD 2009»
14 years 9 months ago
Keyword search in databases: the power of RDBMS
Keyword search in relational databases (RDBs) has been extensively studied recently. A keyword search (or a keyword query) in RDBs is specified by a set of keywords to explore the...
Lu Qin, Jeffrey Xu Yu, Lijun Chang
ISCAS
2006
IEEE
87views Hardware» more  ISCAS 2006»
14 years 2 months ago
Effect of nonlinearity in the CMFB circuit that uses the differential-difference amplifier
—This paper considers one type of common-mode feedback (CMFB) circuit that uses two differential pairs to sense the common-mode output voltage (Voc) of a fully differential op am...
M. M. Zhang, Paul J. Hurst
ICTAI
2005
IEEE
14 years 2 months ago
Subgoal Ordering and Granularity Control for Incremental Planning
In this paper, we study strategies in incremental planning for ordering and grouping subproblems partitioned by the subgoals of a planning problem when each subproblem is solved b...
Chih-Wei Hsu, Yixin Chen