Power reduction during test application is important from the viewpoint of chip reliability and for obtaining correct test results. One of the ways to reduce scan test power is to...
Mohammed ElShoukry, Mohammad Tehranipoor, C. P. Ra...
In this paper we address the problem of minimization of power consumption in combinational circuits by minimizing the number of switching transitions at the output nodes of each g...
R. V. Menon, S. Chennupati, Naveen K. Samala, Damu...
— The paper formulates and solves the problem of optimizing power flows in polyphase systems with significant source (line) impedance. We present two fundamental performance bo...
High efficiency low voltage DC-DC conversion is a key enabler to the design of power-efficient integrated circuits. Typically a star configuration of the DC-DC converters, where o...
Owing to the non-zero probability of the missed detection and false alarm of active primary transmission, a certain degree of performance degradation of the primary user (PU) from...