82 search results - page 12 / 17 » Power reduction techniques for Dynamically Reconfigurable Pr... |
VEE
2006
ACM
14 years 1 months ago
2006
ACM
During recent years, microprocessor energy consumption has been surging and efforts to reduce power and energy have received a lot of attention. At the same time, virtual executio...
GLVLSI
2010
IEEE
14 years 21 days ago
2010
IEEE
NBTI is one of the most important silicon reliability problems facing processor designers today. The impact of NBTI can be mitigated at both the circuit and microarchitecture leve...
VLSID
1993
IEEE
13 years 11 months ago
1993
IEEE
An area-eficzent systolic architecture for realtime, programmable-coeBcient jinite impulse response (FIR)filters is presented. A technique called pipelined clustering is introduce...
DAC
2005
ACM
13 years 9 months ago
2005
ACM
This paper describes a novel technique called Embedded Test-bench Control (ETC), extensively used in the verification of Tensilica’s latest configurable processor. Conventional ...
CASES
2004
ACM
14 years 1 months ago
2004
ACM
While the dynamic voltage scaling (DVS) techniques are efficient in reducing the dynamic energy consumption for the processor, varying voltage alone becomes less effective for t...