82 search results - page 13 / 17 » Power reduction techniques for Dynamically Reconfigurable Pr... |
TVLSI
2010
13 years 2 months ago
2010
In many applications, a reduction of the amount of the original data or a representation of the original data by a small set of variables is often required. Among many techniques, ...
MICRO
2002
IEEE
14 years 15 days ago
2002
IEEE
We describe the design, analysis, and performance of an on–line algorithm to dynamically control the frequency/voltage of a Multiple Clock Domain (MCD) microarchitecture. The MC...
CODES
2009
IEEE
13 years 8 months ago
2009
IEEE
We present a novel loop transformation technique, particularly well suited for optimizing embedded compilers, where an increase in compilation time is acceptable in exchange for s...
ERSA
2006
13 years 9 months ago
2006
- This paper presents the design and implementation methodology of some low power programmable FIR filtering IP cores targeting SoRC and compares their performance in term of area,...
CORR
2010
Springer
13 years 7 months ago
2010
Springer
Considerable research has taken place in recent times in the area of parameterization of software defined radio (SDR) architecture. Parameterization decreases the size of the soft...