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ISPD
1999
ACM
97views Hardware» more  ISPD 1999»
14 years 2 months ago
A methodology to analyze power, voltage drop and their effects on clock skew/delay in early stages of design
This paper presents a methodology to analyze signal integrity such as power voltage drop and clock skew in early stages of design, more specifically, when RTL-design and early flo...
Masato Iwabuchi, Noboru Sakamoto, Yasushi Sekine, ...
FDL
2004
IEEE
14 years 1 months ago
On Actors and Objects - OOP in System Level Design
The steadily increasing complexity of embedded systems requires comprehensive methodoloat support the design process from the highest possible abstraction level. In most of the cu...
Joachim K. Anlauf, Philipp A. Hartmann
DATE
2002
IEEE
94views Hardware» more  DATE 2002»
14 years 3 months ago
A Powerful System Design Methodology Combining OCAPI and Handel-C for Concept Engineering
In this paper, we present an efficient methodology to validate high performance algorithms and prototype them using reconfigurable hardware. We follow a strict topdown Hardware/So...
Klaus Buchenrieder, Andreas Pyttel, Alexander Sedl...
IPPS
1999
IEEE
14 years 2 months ago
The Paderborn University BSP (PUB) Library - Design, Implementation and Performance
The Paderborn University BSP (PUB) library is a parallel C library based on the BSP model. The basic library supports buffered and unbuffered asynchronous communication between an...
Olaf Bonorden, Ben H. H. Juurlink, Ingo von Otte, ...
CODES
1998
IEEE
14 years 2 months ago
Communication synthesis and HW/SW integration for embedded system design
The implementation of codesign applications generally requires the use of heterogeneous resources (e.g., processor cores, hardware accelerators) in one system. Interfacing hardwar...
Guy Gogniat, Michel Auguin, Luc Bianco, Alain Pega...