426 search results - page 49 / 86 » Power-Sensitive Multithreaded Architecture |
IPPS
2006
IEEE
14 years 2 months ago
2006
IEEE
Most programs are repetitive, where similar behavior can be seen at different execution times. Algorithms have been proposed that automatically group similar portions of a program...
CLUSTER
2003
IEEE
14 years 2 months ago
2003
IEEE
Memory may be the only system component that is more commoditized than a microprocessor. To simultaneously exploit this and address the impending memory wall, processing in memory...
EUROPAR
2010
Springer
13 years 10 months ago
2010
Springer
Abstract. Shared last level cache is crucial to performance. However, multithread program model incurs serious contention in shared cache. In this paper, to reduce average cache ac...
ISCA
2006
IEEE
14 years 2 months ago
2006
IEEE
Microprocessor design is undergoing a major paradigm shift towards multi-core designs, in anticipation that future performance gains will come from exploiting threadlevel parallel...
HPCA
2008
IEEE
14 years 9 months ago
2008
IEEE
Dynamic binary translation (DBT) is a runtime instrumentation technique commonly used to support profiling, optimization, secure execution, and bug detection tools for application...