Sciweavers

85 search results - page 11 / 17
» Practical placement and routing techniques for analog circui...
Sort
View
DAC
2009
ACM
14 years 8 months ago
ILP-based pin-count aware design methodology for microfluidic biochips
Digital microfluidic biochips have emerged as a popular alternative for laboratory experiments. To make the biochip feasible for practical applications, pin-count reduction is a k...
Cliff Chiung-Yu Lin, Yao-Wen Chang
SAC
2010
ACM
13 years 7 months ago
Efficient mapping and voltage islanding technique for energy minimization in NoC under design constraints
Voltage islanding technique in Network-on-Chip (NoC) can significantly reduce the computational energy consumption by scaling down the voltage levels of the processing elements (P...
Pavel Ghosh, Arunabha Sen
GLVLSI
1998
IEEE
169views VLSI» more  GLVLSI 1998»
13 years 11 months ago
On the Characterization of Multi-Point Nets in Electronic Designs
Important layout properties of electronic designs include interconnection length values, clock speed, area requirements, and power dissipation. A reliable estimation of those prop...
Dirk Stroobandt, Fadi J. Kurdahi
DAC
2011
ACM
12 years 6 months ago
Fault-tolerant 3D clock network
Clock tree synthesis is one of the most important and challenging problems in 3D ICs. The clock signals have to be delivered by through-silicon vias (TSVs) to different tiers with...
Chiao-Ling Lung, Yu-Shih Su, Shih-Hsiu Huang, Yiyu...
ISPD
2007
ACM
151views Hardware» more  ISPD 2007»
13 years 8 months ago
Pattern sensitive placement for manufacturability
When VLSI technology scales toward 45nm, the lithography wavelength stays at 193nm. This large gap results in strong refractive effects in lithography. Consequently, it is a huge...
Shiyan Hu, Jiang Hu