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ICON
2007
IEEE
14 years 3 months ago
Erlang B as a Performance Model for IP Flows
— Flow-based networking has gained momentum in the research community in recent years. It allows improved performance guarantees and dynamic, load-aware routing. Flowbased networ...
Alexander A. Kist
DAC
2003
ACM
14 years 9 months ago
The synthesis of cyclic combinational circuits
Combinational circuits are generally thought of as acyclic structures. It is known that cyclic structures can be combinational, and techniques have been proposed to analyze cyclic...
Marc D. Riedel, Jehoshua Bruck
EUROPAR
2010
Springer
13 years 9 months ago
Optimized Dense Matrix Multiplication on a Many-Core Architecture
Abstract. Traditional parallel programming methodologies for improving performance assume cache-based parallel systems. However, new architectures, like the IBM Cyclops-64 (C64), b...
Elkin Garcia, Ioannis E. Venetis, Rishi Khan, Guan...
GLVLSI
2009
IEEE
155views VLSI» more  GLVLSI 2009»
14 years 3 months ago
Buffer design and optimization for lut-based structured ASIC design styles
The interconnection delay of pre-fabricated design style dominates circuit delay due to the heavily downstream capacitance. Buffer insertion is a widely used technique to split o...
Po-Yang Hsu, Shu-Ting Lee, Fu-Wei Chen, Yi-Yu Liu
AAAI
2012
11 years 11 months ago
Learning the Kernel Matrix with Low-Rank Multiplicative Shaping
Selecting the optimal kernel is an important and difficult challenge in applying kernel methods to pattern recognition. To address this challenge, multiple kernel learning (MKL) ...
Tomer Levinboim, Fei Sha