47 search results - page 7 / 10 » Precomputation-based Guarding for Dynamic and Leakage Power ... |
ISCAS
2005
IEEE
14 years 21 days ago
2005
IEEE
— In this paper we explore the relationship between power and area. By exploiting parallelism (and thus using more area) one can reduce the switching frequency allowing a reducti...
VLSID
2007
IEEE
14 years 7 months ago
2007
IEEE
We present minimization methodologies and an algorithm for simultaneous scheduling, binding, and allocation for the reduction of total power and power fluctuation during behaviora...
CF
2005
ACM
13 years 9 months ago
2005
ACM
Power consumption within the memory hierarchy grows in importance as on-chip data caches occupy increasingly greater die area. Among dynamic power conservation schemes, horizontal...
DATE
2009
IEEE
14 years 1 months ago
2009
IEEE
this paper proposes a novel Process Variation Aware SRAM architecture designed to inherently support voltage scaling. The peripheral circuitry of the SRAM is modified to selectivel...
ICCD
2001
IEEE
14 years 4 months ago
2001
IEEE
Microprocessor performance has been improved by increasing the capacity of on-chip caches. However, the performance gain comes at the price of increased static energy consumption ...