492 search results - page 39 / 99 » Predictable performance in SMT processors |
ISCA
1998
IEEE
14 years 1 months ago
1998
IEEE
For maximum performance, an out-of-order processor must issue load instructions as early as possible, while avoiding memory-order violations with prior store instructions that wri...
ICS
2005
Tsinghua U.
14 years 2 months ago
2005
Tsinghua U.
With the increasing performance gap between the processor and the memory, the importance of caches is increasing for high performance processors. However, with reducing feature si...
CLUSTER
2004
IEEE
14 years 17 days ago
2004
IEEE
Improving memory performance at software level is more effective in reducing the rapidly expanding gap between processor and memory performance. Loop transformations (e.g. loop un...
DSD
2009
IEEE
14 years 22 days ago
2009
IEEE
Voltage-frequency scaling (VFS) trades a linear processor slowdown for a potentially quadratic reduction in energy consumption. Complex dependencies may exist between different tas...
ISSS
2002
IEEE
14 years 1 months ago
2002
IEEE
Static timing analysis of embedded software is important for systems with hard real-time constraints. To accurately estimate time bounds, it is essential to model the underlying m...