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» Predictable performance in SMT processors
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DATE
2009
IEEE
97views Hardware» more  DATE 2009»
14 years 3 months ago
A flexible floating-point wavelet transform and wavelet packet processor
—The richness of wavelet transformation is known in many fields. There exist different classes of wavelet filters that can be used depending on the application. In this paper, ...
Andre Guntoro, Manfred Glesner
IPPS
2008
IEEE
14 years 3 months ago
DC-SIMD : Dynamic communication for SIMD processors
SIMD (single instruction multiple data)-type processors have been found very efficient in image processing applications, because their repetitive structure is able to exploit the...
Raymond Frijns, Hamed Fatemi, Bart Mesman, Henk Co...
ICCD
2005
IEEE
98views Hardware» more  ICCD 2005»
14 years 5 months ago
Reducing the Latency and Area Cost of Core Swapping through Shared Helper Engines
Technology scaling trends and the limitations of packaging and cooling have intensified the need for thermally efficient architectures and architecture-level temperature managem...
Anahita Shayesteh, Eren Kursun, Timothy Sherwood, ...
HPCA
2004
IEEE
14 years 9 months ago
Reducing the Scheduling Critical Cycle Using Wakeup Prediction
For highest performance, a modern microprocessor must be able to determine if an instruction is ready in the same cycle in which it is to be selected for execution. This creates a...
Todd E. Ehrhart, Sanjay J. Patel
ISLPED
2007
ACM
169views Hardware» more  ISLPED 2007»
13 years 10 months ago
Throughput of multi-core processors under thermal constraints
We analyze the effect of thermal constraints on the performance and power of multi-core processors. We propose system-level power and thermal models, and derive expressions for (a...
Ravishankar Rao, Sarma B. K. Vrudhula, Chaitali Ch...