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CF
2007
ACM
14 years 24 days ago
Accelerating memory decryption and authentication with frequent value prediction
This paper presents a novel architectural technique to hide fetch latency overhead of hardware encrypted and authenticated memory. A number of recent secure processor designs have...
Weidong Shi, Hsien-Hsin S. Lee
MICRO
1999
IEEE
98views Hardware» more  MICRO 1999»
14 years 1 months ago
Access Region Locality for High-Bandwidth Processor Memory System Design
This paper studies an interesting yet less explored behavior of memory access instructions, called access region locality. Unlike the traditional temporal and spatial data localit...
Sangyeun Cho, Pen-Chung Yew, Gyungho Lee
HPCA
2009
IEEE
14 years 9 months ago
Criticality-based optimizations for efficient load processing
Some instructions have more impact on processor performance than others. Identification of these critical instructions can be used to modify and improve instruction processing. Pr...
Samantika Subramaniam, Anne Bracy, Hong Wang 0003,...
ICCD
2003
IEEE
137views Hardware» more  ICCD 2003»
14 years 5 months ago
Dynamic Thread Resizing for Speculative Multithreaded Processors
There is a growing interest in the use of speculative multithreading to speed up the execution of a program. In speculative multithreading model, threads are extracted from a sequ...
Mohamed M. Zahran, Manoj Franklin
ICS
2003
Tsinghua U.
14 years 2 months ago
Predictive dynamic thermal management for multimedia applications
Dynamic Thermal Management (DTM) techniques have been proposed to save on thermal packaging and cooling costs for generalpurpose processors. However, when invoked, these technique...
Jayanth Srinivasan, Sarita V. Adve