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» Predictable performance in SMT processors
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HPCA
2003
IEEE
14 years 9 months ago
Dynamic Data Dependence Tracking and its Application to Branch Prediction
To continue to improve processor performance, microarchitects seek to increase the effective instruction level parallelism (ILP) that can be exploited in applications. A fundament...
Lei Chen, Steve Dropsho, David H. Albonesi
ECRTS
2007
IEEE
14 years 3 months ago
Predictable Paging in Real-Time Systems: A Compiler Approach
Conventionally, the use of virtual memory in real-time systems has been avoided, the main reason being the difficulties it provides to timing analysis. However, there is a trend ...
Isabelle Puaut, Damien Hardy
ISCA
1998
IEEE
102views Hardware» more  ISCA 1998»
14 years 1 months ago
Dynamic History-length Fitting: A Third Level of Adaptivity for Branch Prediction
Accurate branch prediction is essential for obtaining high performance in pipelined superscalar processors that execute instructions speculatively. Some of the best current predic...
Toni Juan, Sanji Sanjeevan, Juan J. Navarro
MAM
2002
63views more  MAM 2002»
13 years 8 months ago
OPTS: increasing branch prediction accuracy under context switch
Accurate branch prediction is essential for obtaining high performance in pipelined superscalar processors. Though many dynamic branch predictors have been proposed to obtain high...
Moon-Sang Lee, Young-Jae Kang, Joonwon Lee, Seung ...
ISCA
1997
IEEE
119views Hardware» more  ISCA 1997»
14 years 11 days ago
The Agree Predictor: A Mechanism for Reducing Negative Branch History Interference
Deeply pipelined, superscalar processors require accurate branch prediction to achieve high performance. Two-level branch predictors have been shown to achieve high prediction acc...
Eric Sprangle, Robert S. Chappell, Mitch Alsup, Ya...