158 search results - page 22 / 32 » Predicting defects with program dependencies |
RTSS
1994
IEEE
13 years 11 months ago
1994
IEEE
The use of caches poses a difficult tradeoff for architects of real-time systems. While caches provide significant performance advantages, they have also been viewed as inherently...
ISCAPDCS
2003
13 years 9 months ago
2003
This paper presents the Dynamic Simultaneous Multithreaded Architecture (DSMT). DSMT efficiently executes multiple threads from a single program on a SMT processor core. To accomp...
HICSS
1999
IEEE
13 years 12 months ago
1999
IEEE
Assessing the reliability of a software system has always been an elusive target. A program may work very well for a number of years and this same program may suddenly become quit...
MICRO
2003
IEEE
14 years 26 days ago
2003
IEEE
Many dynamic optimization and/or binary translation systems hold optimized/translated superblocks in a code cache. Conventional code caching systems suffer from overheads when con...
ISCA
2000
IEEE
14 years 3 hour ago
2000
IEEE
For many applications, branch mispredictions and cache misses limit a processor’s performance to a level well below its peak instruction throughput. A small fraction of static i...