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HPCA
2008
IEEE
14 years 10 months ago
Address-branch correlation: A novel locality for long-latency hard-to-predict branches
Hard-to-predict branches depending on longlatency cache-misses have been recognized as a major performance obstacle for modern microprocessors. With the widening speed gap between...
Hongliang Gao, Yi Ma, Martin Dimitrov, Huiyang Zho...
HPCA
2004
IEEE
14 years 10 months ago
Perceptron-Based Branch Confidence Estimation
Pipeline gating has been proposed for reducing wasted speculative execution due to branch mispredictions. As processors become deeper or wider, pipeline gating becomes more import...
Haitham Akkary, Srikanth T. Srinivasan, Rajendar K...
HPCA
2003
IEEE
14 years 10 months ago
Control Techniques to Eliminate Voltage Emergencies in High Performance Processors
Increasing focus on power dissipation issues in current microprocessors has led to a host of proposals for clock gating and other power-saving techniques. While generally effectiv...
Russ Joseph, David Brooks, Margaret Martonosi
IEEEPACT
2008
IEEE
14 years 4 months ago
Characterizing and modeling the behavior of context switch misses
One of the essential features in modern computer systems is context switching, which allows multiple threads of execution to time-share a limited number of processors. While very ...
Fang Liu, Fei Guo, Yan Solihin, Seongbeom Kim, Abd...
CCGRID
2006
IEEE
14 years 4 months ago
Statistical Properties of Task Running Times in a Global-Scale Grid Environment
— Over the years, the use of global grid environments have become widespread. In order to make applications robust against the dynamics of those grid environments it is essential...
Menno Dobber, Robert D. van der Mei, Ger Koole