180 search results - page 5 / 36 » Prediction error of a fault tolerant neural network |
CIC
2004
13 years 11 months ago
2004
Given the dynamic and harsh environments of electronic textile applications, particularly wearable computers and large-scale sensor networks, fault-tolerance is necessary. The inte...
DATE
2007
IEEE
14 years 4 months ago
2007
IEEE
Future microprocessors will be highly susceptible to transient errors as the sizes of transistors decrease due to CMOS scaling. Prior techniques advocated full scale structural or...
IOLTS
2002
IEEE
14 years 2 months ago
2002
IEEE
A silicon independent C-Based model of the TTP/C protocol was implemented within the EU-founded project FIT. The C-based model is integrated in the C-Sim simulation environment. T...
DSN
2004
IEEE
14 years 1 months ago
2004
IEEE
In this paper, we present a hardware technique, called Self-Repairing Array Structures (SRAS), for masking hard faults in microprocessor array structures, such as the reorder buff...
IPPS
2000
IEEE
14 years 2 months ago
2000
IEEE
The Simultaneous Optical Multiprocessor Exchange Bus (SOME-Bus) is a low-latency, high-bandwidth interconnection network which directly links arbitrary pairs of processor nodes wit...