103 search results - page 10 / 21 » Preference-Guided Register Assignment |
ISCAS
2007
IEEE
14 years 2 months ago
2007
IEEE
Process variation in future technologies can cause severe performance degradation since different parts of the shared Register File (RF) in VLIW processors may operate at various ...
EMSOFT
2005
Springer
14 years 1 months ago
2005
Springer
With the scaling of technology, transient errors caused by external particle strikes have become a critical challenge for microprocessor design. As embedded processors are widely ...
ISVLSI
2007
IEEE
14 years 2 months ago
2007
IEEE
As power consumption of the clock tree dominates over 40% of the total power in modern high performance VLSI designs, measures must be taken to keep it under control. One of the m...
SPAA
2006
ACM
14 years 1 months ago
2006
ACM
This paper investigates time-efficient implementations of atomic read-write registers in message-passing systems where the number of readers can be unbounded. In particular we st...
MICRO
1997
IEEE
13 years 12 months ago
1997
IEEE
The multicluster architecture that we introduce offers a decentralized, dynamically-scheduled architecture, in which the register files, dispatch queue, and functional units of t...