47 search results - page 5 / 10 » Prefetch-Aware DRAM Controllers |
ASPDAC
2000
ACM
14 years 1 months ago
2000
ACM
Testing embedded memories is becoming an industry-wide concern with the advent of deep-submicron technology and system-on-chip applications. We present a prototype chip for a progr...
ISCA
2010
IEEE
14 years 2 months ago
2010
IEEE
DRAM vendors have traditionally optimized the cost-perbit metric, often making design decisions that incur energy penalties. A prime example is the overfetch feature in DRAM, wher...
ESTIMEDIA
2007
Springer
14 years 4 months ago
2007
Springer
SoCs for multimedia applications typically use only one port to off-chip DRAM for cost reasons. The sharing of interconnect and the off-chip DRAM port by several IP blocks makes t...
ICS
2000
Tsinghua U.
14 years 1 months ago
2000
Tsinghua U.
Memory system bottlenecks limit performance for many applications, and computations with strided access patterns are among the hardest hit. The streams used in such applications h...
ISCA
2007
IEEE
14 years 4 months ago
2007
IEEE
With increasing speed and power density, high-performance memories, including FB-DIMM (Fully Buffered DIMM) and DDR2 DRAM, now begin to require dynamic thermal management (DTM) a...