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ICCAD
2006
IEEE
111views Hardware» more  ICCAD 2006»
14 years 5 months ago
Mapping arbitrary logic functions into synchronous embedded memories for area reduction on FPGAs
This work describes a new mapping technique, RAM-MAP, that identifies parts of circuits that can be efficiently mapped into the synchronous embedded memories found on field prog...
Gordon R. Chiu, Deshanand P. Singh, Valavan Manoha...
ICCAD
2004
IEEE
127views Hardware» more  ICCAD 2004»
14 years 5 months ago
A yield improvement methodology using pre- and post-silicon statistical clock scheduling
— In deep sub-micron technologies, process variations can cause significant path delay and clock skew uncertainties thereby lead to timing failure and yield loss. In this paper,...
Jeng-Liang Tsai, Dong Hyun Baik, Charlie Chung-Pin...
ICCAD
2003
IEEE
194views Hardware» more  ICCAD 2003»
14 years 5 months ago
On the Interaction Between Power-Aware FPGA CAD Algorithms
As Field-Programmable Gate Array (FPGA) power consumption continues to increase, lower power FPGA circuitry, architectures, and Computer-Aided Design (CAD) tools need to be develo...
Julien Lamoureux, Steven J. E. Wilton
SOSP
2009
ACM
14 years 5 months ago
Fabric: a platform for secure distributed computation and storage
Fabric is a new system and language for building secure distributed information systems. It is a decentralized system that allows heterogeneous network nodes to securely share bot...
Jed Liu, Michael D. George, K. Vikram, Xin Qi, Luc...
SOSP
2009
ACM
14 years 5 months ago
RouteBricks: exploiting parallelism to scale software routers
We revisit the problem of scaling software routers, motivated by recent advances in server technology that enable highspeed parallel processing—a feature router workloads appear...
Mihai Dobrescu, Norbert Egi, Katerina J. Argyraki,...